Volume : 2, Issue : 11, NOV 2016
DESIGN AND DEVELOPMENT OF VERIFICATION ENVIRONMENT TO VERIFY AHB2APB BRIDGE PROTOCOL USING UVM
NARRA VENKATA KRISHNA, N.G.N. PRASAD, G.S.S. PRASAD
Abstract
The AMBA AHB is for high-performance, high clock frequency system modules. The AHB acts as the high-performance backbone system bus. AHB supports the efficient connection of processors. The AMBA APB is optimized for low power consumption and interface reduced complexity to support peripheral functions. In this project functions of the AHB2APB Bridge protocol by writing the code in VERILOG and simulating it in XILINX ISE. In this project, we verify the all functions of Bridge protocol by writing verification code in UVM with different test cases. The code coverage and functional coverage and functional verification of the Bridge RTL design is 100% covered by using QUESTASIM.
Keywords
AHB, APB, QUESTASIM, XILINX ISE, AHB2APB Bridge, Verilog, UVM, Coverage, FPGA.
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